Terasic DE1-SoC-MTL Main Boards

  • Manufacturer: Terasic
    Model: DE1-SoC-MTL
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FPGA Device
    Cyclone V SoC 5CSEMA5F31C6 Device
    Dual-core ARM Cortex-A9 (HPS)
    85K Programmable Logic Elements
    4,450 Kbits embedded memory
    6 Fractional PLLs
    2 Hard Memory Controllers
Configuration and Debug
    Quad Serial Configuration device – EPCQ256 on FPGA
    On-Board USB Blaster II (Normal type B USB connector)
Memory Device
    64MB (32Mx16) SDRAM on FPGA
    1GB (2x256Mx16) DDR3 SDRAM on HPS
    Micro SD Card Socket on HPS
    Two Port USB 2.0 Host (ULPI interface with USB type A connector)
    USB to UART (micro USB type B connector)
    10/100/1000 Ethernet
    PS/2 mouse/keyboard
    IR Emitter/Receiver
    Two 40-pin Expansion Headers
    One 10-pin ADC Input Header
    One LTC connector (One Serial Peripheral Interface (SPI) Master ,one I2C and one GPIO interface )
    24-bit VGA DAC
    24-bit CODEC, Line-in, line-out, and microphone-in jacks
Video Input
    TV Decoder (NTSC/PAL/SECAM) and TV-in connector
    Fast throughput rate: 1 MSPS
    Channel number: 8
    Resolution: 12 bits
    Analog input range : 0 ~ 2.5 V or 0 ~ 5V as selected via the RANGE bit in the control registe
Switches, Buttons and Indicators
    4 User Keys (FPGA x4)
    10 User switches (FPGA x10)
    11 User LEDs (FPGA x10 ; HPS x 1)
    2 HPS Reset Buttons (HPS_RST_n and HPS_WARM_RST_n)
    Six 7-segment displays
    G-Sensor on HPS
    12V DC input
        7-inch panel
        800x480 pixels
        24-bits color depth
        TTL interface
        Capacitive Touch Screen
        Multi-touch Gestures
        Single Touch Support
        IDE Connector
        2x20 GPIO connector with ITG (IDE to GPIO) adapter



DE1-SoC-MTL delivers everything you need to develop multimedia applications using a digital multi-touch panel and includes complete reference designs and source code for implementing on a wide range of applications. The fully integrated kit allows developers to rapidly customize to best suit their specific application. The DE1-SoC-MTL features the DE1-SoC development board comes with the Cyclone V SoC FPGA, and the Terasic Multi-touch LCD Module (MTL), which is an all-purpose capacitive touch-screen for FPGA applications it provides multi-touch gesture and single-touch support. An IDE cable with an IDE to GPIO adapter (ITG) is used to interface the MTL with DE1-SoC board through a 2x20 GPIO interface.

The DE1-SoC-MTL is preconfigured with an FPGA hardware reference design including several ready-to-run demonstration
applications stored on the provided SD card. Software developers can use these reference designs as their platform to quickly
architect, develop, and build complex embedded systems

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